1. Field of Invention
The present invention relates to a capacitor structure. More particularly, the present invention relates to an interdigitated multilayer capacitor structure.
2. Description of Related Art
Generally, the capacitor structure of the deep sub-micron complementary metal-oxide semiconductor comprises two parallel plate electrodes separated from each other by a dielectric layer. The plate electrodes typically are constructed by several layers of conductive material such as polysilicon or metal. In order to increase the capacitance of the capacitor structure, the extended structure or internal structure are added onto the original plate electrodes for further increasing the surface area of the plate electrodes. However, the major limitation of the parallel plate capacitor structure is that the minimum distance between the plate electrodes does not change as the size of the complementary metal-oxide semiconductor is scaled down. Therefore, even in the deep sub-micron generation of complementary metal-oxide semiconductor, the capacitance density of the plate capacitor structure is low.
Typically, the interdigitated capacitor structure is used in microwave applications. This kind of capacitor structure comprises closely arranged, interdigitated conductive structures. Therefore, the fringing capacitances and the crossover capacitances are produced between the interdigitated conductive structures to achieve high capacitance. Nevertheless, the crossover capacitances of the interdigitated capacitor structure is limited to a single conductor level. Hence, it is important to improve the capacitor structure of the deep sub-micron complementary metal-oxide semiconductor to increase the capacitance under the present specification.